We are quite familiar with the terms Simulation and Emulation. Both are part of VLSI. Now the question is , how they are different? Today we will try to understand it.
Simulation :
A simulation is the imitation of the operation of a real-world process or system over time. Simulations require the use of models. Those model represents the key characteristics or behaviors of the selected system or process. Simulation represents the evolution of the model over time. A simulator acts like a system but may not necessarily abide by all the rules of the system.
For example, take flight simulator. It feels like we are flying an airplane, but in reality we are completely disconnected from flying the plane.
Another example is Car Simulator which is used for training. When u r in a car simulator it seems that u r riding a car although u r on a seat which moves according to the visuals u r watching on the screen.
Simulators in VLSI :
HDL simulators are softwares that simulate expressions written in VHDL/Verilog/SystemVerilog one of the hardware description languages to verify its correctness before implementing on Silicon. Simulation is the process of describing the behavior of the circuit using input signals, output signals and delays.Functional simulation is necessary for complex designs, because early detection of logical errors saves significant time and expense.
Now if we move to the analog circuit the similar kind of simulation is done by spice simulators through pure spice , accelerated spice or fast spice methodologies.
Commercial HDL simulators are VCS from sysopsys, NCSIM from Cadence, Modelsim from Mentor-Simens.
For analog simulation most popular simulators are Hspice from Synopsys, Spectre from Cadence and ELDO from Mentor-Simens.
Emulation :
Emulation is a system that acts exactly like something else and abides by all of the rules of the system being emulated. It’s like duplicating every aspect of the original device’s behavior. It is efficiently a complete imitation of another system, from being binary compatible with the emulated systems inputs and outputs, but operating in a different environment to the environment of the original emulated system. The rules are permanently fixed, and cannot be changed . In today’s time hardware emulation has become one of the popular tools for the verification.
Emulation started in late 80s and implemented with commercial FPGAs. It became especially popular in the 1990s to verify processor and graphics designs that required long sequences of test cycles.
In the past few years, the emulation user community has expanded exponentially as software developers has joined the group along with hardware designers and verification engineers.
Emulators are faster and can have higher capacity than simulators. Emulation become more significant as single processor performance stopped scaling. The logic simulation processes is not suitable for parallel processing. Simulators are struggling with both the growing size and complexity of design. Hardware emulation gained popularity because of its capaility to debug both the hardware and software of complex SoC designs. Emulators are a lot more expensive than simulators. Good thing is that emulation cost per gate has steadily declined over the years. This means that they have been getting more affordable and increasingly required.
The most significant advantage of emulation over simulation is speed and its ability to operate in system environment.
Commercial emulators are ZeBu from Synopsys, Palladium from Cadence , Veloce from Mentor.
Simulation or Emulation : which one to choose
Now lets discuss where to use simulation and where to use emulation. HDL simulators are good for hardware debug in the early stages of the design cycle, when the design is focused at the block level. Easy to use, quick to setup and amazingly fast to compile a design. They are exceptionally flexible to debug a hardware design. They support several design iterations per day, as long as the design size is reasonable. They become problematic when number of gates increases. So simulators basically fails at system-level design verification. They are not capable of embedded software validation also.
On the other hand, hardware emulation can find almost all design bugs. Both in the hardware or in the SoC’s embedded software. They accommodate any design size. They require a long time to setup and they are relatively slow to compile, compared to the simulator. Modern emulators support many concurrent users, including via remote access.
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