In this article we will discuss about Full and Semi custom IC designs.
Depending on designing procedure overall VLSI design is grossly classified into two : Full Custom and Semi Custom design.
Further Semi Custom ICs are of below types:
i. Analog Array
ii. Gate Array
iii. Standard Cell IC
iv. Programmable IC
Programmable IC again divided into :
i. PLDs
ii. PROM
iii. PLA
iv. PGA
v. FPGA
Now let's get an overview of different type of ICs.
I.Full Custom ICs :
The designs which are to be fabricated in extremely super-high-volumes and intended for high volume of sales are
suitable for Full Customs ASICs. Under some special conditions Full Custom ASICs design is followed.
Few of such conditions are :
1. There is no suitable existing libraries available.
2. Existing libraries are not fast enough.
3. Available Pre-designed & Characterized cells consume too much power or area w.r.to the intended design.
Now lets' see how Full Custom Design is done. In Full Custom Design a chip is designed from scratch. Hence time
taken to design IC is longer. All of the logic cells, circuits, and the chip layout are handcrafted by Design
Engineers. Here each individual transistor and the interconnections between them are designed by hand. Mask layers are created by hand in order to fabricate a full-custom IC. Chip Performance maximized and area is minimized at
the cost of human-labor-hours. Full-custom ICs are the most expensive to manufacture and to design.
Advantages :
i. Complete design flexibility
ii. High degree of Power Performance Area (PPA) optimization
iii. Smallest die size
Disadvantages:
i. Large amount of design effort required
ii. Expensive
Example : Microprocessor, Sensors and Actuators, Analog-
Digital Mixed Signal Communication Chips.
II. Semi-Custom ICs :
In Semi-Custom ASIC design a portion of the circuit function is predefined and unalterable, while other portions
are alterable as per need. Pre-designed, Pre-tested and Pre-characterized Standard Cell Libraries or Preconfigured
Arrays are heavily used in such design. Other mega-blocks , such as Micro-controller or Microprocessors, are full-custom
blocks. Many other ready-to-cook blocks , such as System-Level Macros (SLM) , Functional Standard Blocks (FSBs) and IP-Cores are also available to add into the chip making recipe. In the chip layout, location of the building blocks and wiring between them is fully customized through Physical Design. Reusable cell library reduces human effort for a design closure before tape-out. Consequently Semi-Custom ASICs are the less expensive for production.
Advantages:
Time and Money saver & Reduce The risk associated with
full-custom design.
Disadvantages:
Long Manufacture Time & High Non-Recurring-Engineering (NRE) cost.
Examples :
Ethernet Chip, Hard Disk Controller.
III. Gate Array:
Identical cells are Pre-fabricated in the form of Two Dimensional Array on a Gate-Array. Parts of the chip are Pre-Fabricated. Rest of the chip are custom fabricated for any intended design.
There are two types of gate arrays :
i. Channeled Gate Array
ii. Channel-less Gate Array (Sea-of-Gates Array)
In Channeled Gate Arrays, empty spaces are set aside between the base cells to accommodate the wires.
In Channel-Less Gate Array, no such predefined spaces are set aside for routing between the cells.
Interconnection wiring are done above the cells.
Advantages:
Cost saving due to identical structure.
Disadvantages:
Performance is not at per Full-Custom or Standard-Cell-Based ASICs.
IV. Programmable Logic Devices (PLDs):
A PLD is a ready to cook chip-block for implementing logic circuitry. Transistors and Wires are already Pre-exsisting
on it. Logic cells and interconnect can be programmed by end-user to implement specific design. No need to create
custom masks for each customer. Depending on capacity, complexity and architecture, may be further classified as:
i. Simple PLDs (SPLDs),
ii. Complex PLDs (CPLDs)
iii. Field-Programmable Gate Arrays (FPGAs).
Advantages:
Used for low-volume production with Non-Recurring-Engineering Cost, Fast Turnaround Time (TAT).
Disadvantages:
Larger Chip Size , Lower Performance.
V. PLA/SPLD , PAL , CPLD :
1. Programmable Logic Array (PLA a.k.a SPLD):
Here logic functions can be realized in Sum-of-
Products(SOP) form. A programmable AND array
followed by a programmable OR array.
2. Programmable Array Logic Device (PAL) :
A device similar to PLA with improvement on its
weaknesses. A programmable AND array followed by a
fixed OR array. Here OR gate Outputs are followed by
Flip-Flops.
3. Complex Programmable Logic Device (CPLD):
A CPLD consist of multiple PAL-like blocks on a single
chip with programmable wiring to connect the blocks.
VI. Field-Programmable Gate Array/ FPGA :
FPGA is a high capacity programmable logic device. FPGA contains array of programmable basic logic cells surrounded
by programmable interconnect. All of these can be configured/programmed by end-user for intended design.
Both combinational and sequential logic are achievable.
Capacity: 1K to 1M logic gates.
Speed: Up to 100MHz.
Popular applications: Prototyping, FPGA-based computers, DSP, logic emulation etc.
Now let's compare them based on PPA, Cost and TAT :
Now let's do engineering comparison :
From above discussion we can draw below conclusions :
Full Custom can give the best packing density inside the
silicon die and performance. It is used for microprocessors and other complex volume applications.
Faster design closure time and lower cost are the key success point of standard cell over full-custom. For large design, it is the best practice to partition the circuit into smaller sub-blocks which are designed using different team.
FPGA may be used for simple and low volume applications.
However, Gate Arrays provide much higher density over FPGA.
Find the video lecture here :
Image Courtesy : Photo by Umberto on Unsplash
