What Is EDA Automation in VLSI

In this article we will discuss about Electronic Design Automation or simply design automation. Electronic Design Automation  is abbreviated as EDA and this is the most important matrix in the entire VLSI design flow.

Entire VLSI design flow broadly divided into two part: 

1. Front-End   ;           2. Back-End.

This classification is valid for both analog and digital IC design flow. Now let us understand both Analog and Digital IC design Flows one by one.

Analog Design : 

Here design flow starts with design specification.Then schematic design is done and it is done by hand.Then CDL simulation is done.Next spice netlist is extracted from CDL file and using some popular spice tool. Some popular commercial spice tool are HSPICE, Spectre, Eldo Sim.Depending on design necessity and company one or more even in some scenario all three tools are used on same design, obviously in separate run. After that back end of the flow starts with Layout design. DRC and LVS check are performed on the layout. Once the DRC and LVS is clean we move forward and do the parasitic R and C extraction. Then we go towards physical verification steps like IR Drop analysis, Electro Migration analysis, Antenna checks etc. Once all the verification steps are done properly we will move to electrical and timing characterization and ready for the delivery.

ASIC/SOC Design :   

Here also design flow starts with design specification.Then we move to RTL Coding and perform the functional verification. After that synthesis is done to create get level netlist. The synthesized netlist is moved to the pre-layout static timing analysis. After that Design For Testibility or DFT is performed.  Now we enter back end.First we do Floor Planning and PnR i.e Place and Route. Floor planning is keeping different blocks at different place and do the area budgeting. Then we do placement of these blocks and do the metal routing and connectivity. Then we do DRC and LVS check on the layout that has come out of the Floor-Plan and Routing stage. Then we do the parasitic RC extraction. Then we proceed towards the STA and Physical Verification. This STA is Post-Layout STA. In physical verification we do IR Drop analysis, EM analysis,Antenna Rule Check etc. Next comes Formal verification and sign off.  

Significance of Design Automation :

Design automation reduce human time and labour. PERL, TCL, SHELL, Python are some popular scripting language used  to develop design automation. Some popular category of work that an engineer do in day-to-day basis is automated. Such as,

1. Tool run

2. Parsing tool output and generating report

In some situation when multiple steps are done sequentially, in later step  we get undesirable output.  We need to get back to the previous step and modify the input. Again we need to redo the step. Such kind of iteration is very common in design flow and they are very time consuming if done by hand. Automation is inevitable here.

The Iteration by Hand takes a Lot of Time. Hence PERL/Python/Shell/Qt Scripting is used to Automate. Internal scripting of Design Tools is done using TCS and APIs. Layout automation Is Done using TCL/TK  or SKILL. Dedicated team for coding and automation creates a GUI based Launch-And-Monitor-Cockpit to control iterations. Its an extremely helpful application for a VLSI engineer. Such GUI based system saves time and effort and expedite the process. Sanctity of the output data is verified by  PERL/Python/Shell/Qt post-Processing scripts. EDA Tool Vendors also Offers GUI automation interfaces. 

TCL Automation: Running Tool & QC/QA of output

Here we will see how TCL automation is done with a tool. There are set of input files once these files are processed , the tool has Design Under Test and all the annotated data. The design, load, skew all comes from input files. There is a live shell i.e. tool  shell and it is ready to interact. So all the input file and commands are provided through tool shell. Here automation is done using TCL script and Tool APIs.This TCL script can be sourced using the source command. Once the tool has completed the run, most important step is to do QC/QA of the result. Let's take an example. Suppose the output file contain multiple resistor values and corresponding current, voltage and slew. Now with the help of PERL automation the output file is parsed and the data is kept in a PERL hash. Now the representation of the output data is done again by automation. Data from PERL hash usually dumped in CSV or EXCL format using PERL automation. If you are interested in PERL or TCL scripting we have in-depth series , both in YOUTUBE and in this blog.

PERL Series : Watch here; Read here

TCL Series :  Watch here; Read here  

Bench-Marking of Tools :

Suppose there are two tools from two different EDA vendor for similar design step and purpose.Now we have two different output files from two tools.Now we perse both the output and populate  Hash1 with data from Tool1 and similarly Hash2 with data from Tool2.  We compare the values and write the compared data in the benchmark output in text or CSV format or in the both format.  

So let's summarize what we know till now. Without the EDA , the chip design is nearly impossible. Existing Automation Setup helps any new employee to accelerate in the production. Human errors are minimized by the automation. The Design Automation boosts the Time-To-Market of a chip.Level of complicity in a chip design is made even with the use of the automation.

Watch the video lecture here: 

Courtesy : Image by Oleg Gamulinskiy from Pixabay