Apr 29, 2023

Different VLSI Job Roles



In this article we will discuss about different job roles and their scope of work in VLSI. 

This article is specifically intended for freshers or those who are planning to join the domain.

1. Design Engineer :

Design Engineer is a job role where the engineer designs a brand new circuit for an upcoming chip or modifies an existing design already realized in form of a published chip. In VLSI we design fresh chips as per need, hence we have to start a design from scratch. Here the need of a design engineer come into the picture. Design engineer can work at  SOC/Chip level, sub-chip/sub-system level or IP level. 

Now lets discuss about the different design engineer roles we usually see across entire VLSI arena.

a) RTL design engineer:

They design a particular digital circuit using HDL. They take help of state machine to capture and incorporate any novel digital design. 

The job role may include the responsibilities like:

i.  designing the functions of modules of the system-on-chip (SOC) as per input and output specifications.

ii. Optimizing the design to achieve best power, performance and area.

iii. Implementation and verification of high performance and low power clock distribution network and building blocks.

b) Physical Design Engineer :

Physical Design Engineer has to work on the chip layout. The work may start from floor planning and may go up to engineering change order(ECO).

c) IP level Design Engineer : 

Design at the very block level with basic functionalities. The nature of design could be digital, analog or digital+analog i.e. Mixed signal.

d) The Digital Design Engineer : 

The Digital Design Engineer / Architect is responsible for defining and realizing Digital functions on IPs, Subsystem or IC level based on required specifications.

e) Analog Design Engineer : If the IP under design is an analog one then we call them analog design engineer. Different Types of Memory design comes under analog design.


2. Verification Engineer:

Well after design engineer post lets understand about verification engineer.

When a design is made by a design engineer it has to get verified for its intended functionality with all sort of possible permutation and combination of input and control signal values.Hence the need of a verification engineer comes into the picture. Depending on nature of the circuit and methodology of verification we can further divide job roles into  

a) Digital Verification

b) Analog Verification

c) AMS Verification

d) DFT

Verification engineers design and implement testing procedures to determine if products work as intended. 

These skilled engineers are responsible for creating the initial product verification methodology, selecting 

the testing environments, and developing testing plans.

a) Digital verification : 

The digital verification engineer operates before the FPGA, ASIC or SoC production phase. He works with the design teams (FPGA engineers, microelectronic engineers, etc.) in order to verify their designs (IP, sub-system, system).

The verification can be realized at different abstraction levels.

i. RTL unit blocks verification :  

The verification can be made at the RTL blocks level. Thus, we test all the functionalities of an IP through simulations.

ii. Verification at the sub-system level : 

The verification can also be realized at the sub-system level including several IP. Then, we check all their functionalities and their integration in the sub-system.

iii. Top level verification :

Once the RTL design is verified at the unit level, we can integrate it at the top level.

Required skills includes : 

i) Skills in ASIC / FPGA verification (directed test or SystemVerilog / UVM)

ii) Basic knowledge in design techniques Verilog or VHDL.

iii) A good knowledge of simulation flow.

iv) Good basis in scripting Python, Perl, Bash…


b) Analog Verification : Analog verification is a methodology for performing functional verification on analog, mixed-signal and RF integrated circuits and systems on chip.

c) Analog-Mixed Signal Verification : 

A single verification environment combining both analog and digital solvers that can be used to functionally verify at the desired level of accuracy using either option or both digital (speed) and analog (accuracy) engines. Metric-driven verification (MDV) to analog components in a mixed-signal design.

d) DFT : 

Above mentioned three types of verification are pre-production whereas DFT is done after production of the chip. During the design process extra logic is put in the design which actually used to do post production testing. The purpose of DFT is to validate or verify that the end product does ot contain any manufacturing defects. 

3. Physical Design(PD) Engineer :

Moving to Physical Design means moving from abstract level to Silicon level, so actually all the engineers look to the design through lens of Silicon. Physical design or back end starts after Synthesis and includes steps up to sign off. So basically  floor planning, placement and routing, timing or STA , power budget and area, implementing ECO tasks (timing and functional ECOs)  to address functional bugs and timing violation,physical verification like LVS,DRC.. etc ,Noise analysis, Electro-Migration, Antenna checks all these comes under job role of PD Engineer. Obviously it should be a big team to perform and complete all these complex works. 

Required Technical and Professional Expertise : 

i) Good knowledge and hands on experience in physical design methodology which include logic synthesis, placement, clock tree synthesis, routing .

ii) Should be knowledgeable in physical verification ( LVS,DRC.. etc) ,Noise analysis, Power analysis and electro migration . Good knowledge and hands on experience in static timing analysis (closing timing at chip level ) , good understanding of timing constraints .

iii)  Automation skills in PERL ,SKILL and/or TCL

iv)  Strong Back ground of ASIC Physical Design: Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure.

v) Extensive experience and detailed knowledge in Cadence or Synopsys or Magma physical Design Tools.

vi) Static Timing Analysis in Prime-time or Prime-time-SI.


4. Application Engineer :

Application Engineers works at the customer interface. They both take care internal and external customers.It does not mean to meet the customer face to face always. There is a continuous communication via mail or ticketing systems . They take care of customer need. Lets understand these from perspective of a EDA tool vendor. 

An  EDA tool company sell its products or tools to many design houses. Every company wants to make their tool bug free although all tool have some bug. When the engineers from design team face any issue regarding the tool they get back to the EDA tool vendor and application engineer from EDA company look into the issue. If required Application Engineer take RnD team the loop and give solution to the customer. This is basically post sale position. 

In some cases Application Engineer post is pre-sale position and their job role includes visit to customer campus. In such visit actually they meet new teams try to understand if there is any requirement where their EDA tool can fit. If a FAE can take up any lead and convert it into sell then the matter goes to account manager and sells executive. 

This job role requires communications skills including written, verbal, through webex/zoom/google meet. Good technical  understanding is the core quality one need to excel in this domain. 

Field Application Engineer, Corporate application engineer, Application consultant are some popular designation of application engineers. The job title depends on companies. This kind of job role give you satisfaction of solving problem, high stress of handling demanding customer, glamour of travelling and obviously you will get amazing experience of people interface. 

5. CAD Engineer :

CAD engineers are experts in CAD tool and they develop flows that integrate multiple tools creating a rather seamless environment for other engineers to use.  Develops and applies computer aided design (CAD) software engineering methods, theories and research techniques in the investigation and solution of technical problems. Assessing architecture and hardware limitations, plans technical projects in the design and development of CAD software defines and selects new approaches and implementation of CAD software engineering applications  and design specifications and parameters. Develops routines and utility programs. Prepares design specifications, analysis and recommendations for presentation and approval may specify materials, equipment and supplies required for completion of projects and may evaluate vendor capabilities to provide required products or services.

Required Technical and Professional Expertise :  l 

i)    Good knowledge of scripting languages like Python/TCL/PERL 

ii)  Exposure to C/C++/or other functional programming language

iii) Experience in different commercial tools 

iv)  Good understanding in VLSI domain

v)   Familiarity with standard software engineering practices for version control, configuration management, testing, root cause analysis and quality assurance.

vi) Teamwork, communication (vertical and/or horizontal) and problem-solving skills

vii) In depth knowledge in Data Structures, Algorithms and Optimizations

For CAD engineer it is advisable to gather as much as domain knowledge possible in the area of working.


6. Characterization Engineer :

There can be various types of characterization in the entire VLSI arena. At the very basic point characterisation means to list out the electrical properties and/or associated physical pproperties, associated with a circuit under concern. Now by the nature of the circuit whether it is digital, analog, io, memory the definition of the respective job role is defined like ,

i) Standard Cell Characterisation

ii) I/O characterisation

iii) Memory Characterisation

For the characterization there are generally industry standard simulation tools are there. if you are going for such a job role you have to learn respective EDA software . For standard cell characterization CADENCE liberate or Synopsys Silicon Smart are most popular two EDA tools.

For memory characterisation whether you are designing a RAM, ROM, NVM or non-volatile memory generally there are lot of custom scripts combined with professinal EDA tools will be given to you. For such characterisation jobs strong fundamental knowledge of the respective circuit is required. 

7.  Silicon Test CHIP Engineer :

TEST chip is a functional miniature prototype of the ASIC chip under concern or the test chip could be a trst vehicle to test various design IPs of a IP design house. The test chip engineer. has to be a jack of all trades. He or She must know all the steps from RTL to GDSII and Hence the TEST chip engineer job role is challenging and highly rewarding.

8. Sign-Off  Engineer :

You might come across the name sign off engineer however for you freshers we would like to tell you that this positions are not for freshers. 

When you have atleast 10-15 yrs of continuous experience then only you can loo towards this jobs. 





Courtesy : Image by Israel Andrade-YI from unsplash