Integrated Circuit designing is a time and effort extensive process. Journey of a chip starts with a specification and reach to the stage of tape out through set of steps. All steps are very much well defined and in sync with adjacent steps. With time technology moves forward and feature size of transistor has reduced although the basic structure of the design methodology remain same. With time new sub-steps have been added. In this article we will discuss the methodology of chip designing and impact of Y chart on it.
Design Methodology:
There are two approaches :
i. Top Down Design
ii. Bottom Up Design .
Design process is a combination of top-down and bottom-up processes that are happening concurrently in the designer's mind until he reaches a final correct design.
Hierarchical Design Approach:
Fig 2: Top-Down Design
Top-down design : Top-level block is designed first and then comes the sub-blocks. Further the sub-blocks are subdivided until the procedure reach leaf cells. Initial design steps are quite abstract and theoretical and there is no real connection with Silicon.
Bottom -up design : Starts at the silicon/circuit level and builds units like logic gates, adders, and registers as the first steps. Then gradually group them up to build modules and finally the whole design is completed.
Design Hierarchies:
There are three major design hierarchies:
1. behavioral hierarchy
2. structural hierarchy
3. physical hierarchy
The mapping of a behavior into a structural hierarchy is logic design process. The mapping of a structure into physical hierarchy is physical design process. Behavior and structural design processes go on concurrently, while the physical design process is done separately. Physical design leads to iterations in behavioral, structural hierarchies during a design. This hierarchical behavior design process provides for a iterative refinement of the initial design specification as shown in Fig 1.
Y -diagram:
Fig 4 : Y -diagram
In Y chart we can plot behavioral , structural and physical domain along with their sub-steps. It helps us understand digital hardware design.
3 Axes represent the three domains of VLSI :
Behavioral: This domain is all about what a particular system does.
Structural: This domain is about how entities are connected together.
Physical : This domain is about how to build a structure on Si that has the required connectivity to implement the behavior.
5 concentric circles represent five levels of importance or detail in the design: System, Algorithm, Register Transfer, Logic, Circuit Level. Outermost circle is the most general and each circle closer to the center, represents a smaller and more specific part of the design. The five main characteristics at each level of abstraction are basic building blocks, signal representation, time representation, behavioral representation and physical representation.
Domain & Levels :
Behavioral domain is all about how a system functions. We imagine a part of the design as a mysterious black box and focus on the relationship between inputs outputs. In structural domain we describe a system by its different parts or subsystems. Geometrical or Physical domain gives information on how the sub-parts can be seen in structural domain. System level is highest level of abstraction. Circuit Level is the innermost level of abstraction.
Regularity, Modularity & Locality :
Hierarchical design approach reduces the design complexity by dividing the large system into several sub-modules. Such decomposition of a large system results in simple and similar blocks. This is called Regularity.
Functional blocks which make up the larger system must have well-defined functions and interfaces. This is called Modularity. Modularity allows that each block or module can be designed relatively independently from each other. All of the blocks can be combined with ease at the end of the design process, to form the large system. The concept of modularity enables the parallelization of the design process.
Locality is ensuring that connections are mostly between neighboring modules, avoiding long-distance connections as much as possible.
Design and Development :
Fig 4 : Y -diagram & Design Development
Design flow starts from the algorithm describing the behavior of the target chip. Corresponding architecture of the processor is first defined and mapped onto the chip surface by floor planning. Next in the behavioral domain finite state machines (FSMs) are defined and structurally implemented with functional modules such as registers and arithmetic logic units (ALUs). These modules are then geometrically placed onto the chip surface using CAD tools for automatic module placement followed by routing with minimum possible interconnects and signal delays. Next behavioral description of modules are defined and implemented with leaf cells.
At this stage the chip is described in terms of logic gates or leaf cells. Leaf cells are placed and interconnected by using a cell placement & routing program. At the last level detailed Boolean description of leaf cells are followed by a transistor level implementation of leaf cells. Finally mask for the design is generated. In standard-cell based design, pre- designed cells from library are used for logic design.
Design Stages :
Fig 5 : Y -diagram & Design Steps
1. Logic design : Written in C or behavioral HDL/Verilog.
2. Simulation : Functional simulations is to verify the behavior and compliance with the Spec.
3. Synthesis : Hardware description is converted into lower level description e.g. logic or Boolean expression. Some of the main steps are: high level synthesis , Register transfer level synthesis, gate level synthesis and technology mapping.
4. Physical design : Structural description is converted into physical placement of transistor resulting in layout.
5. Verification : Checking whether a design meets the specification and performance parameters. Three main ways to check the correctness of the IC without fabricating it includes prototyping, simulation and formal verification.
6. Testing : Checking is done to see whether the device is properly fabricated or not and detecting the physical defects of a die or a package during manufacturing process.
Some of the design tasks are clearly visualized as transitions in the Y-chart either within a single domain or from one domain to another (Fig 5).
Fig 6 : Design Steps
