Nov 17, 2023

Power Management Unit and Methods in VLSI



In SOC more and more transistors are getting added and pulling to the risk of very high power dissipation in a die. In contrary customers look for portable, handheld devices having long battery life time after a single charge. Chips in mobile and handheld devices advanced power-management systems that can improve energy efficiency without sacrificing performance.  This is done by adapting to the demands and constraints of particular workloads. Mobile, IoT or Handheld devices usually often driven by an unpredictable sensor or a user input. These have especially bursty workloads with short periods of high compute demand followed by long periods of inactivity. Modern VLSI circuits are integrated with a separate power management unit whose function is to manage the power distribution in the die efficiently.


Power Delivery Network : Significance



The Power Grid in ASIC provides power to turn on/off any VLSI chip. Power Delivery Network Carries Power towards the leaf cell such as : Standard Cells, IPs-Block or Macro-Blocks. The Power Management Unit (PMU) resides in between the above mentioned leaf cells and the Power Grid to control the flow of power. PMU Decides and Manages the power consumption through segregation known as Power Domains.

Power Domain (PD) Concept:


Blocks which can be operated with the same power supply are identified & tied together. This forms a Power Domain. A particular power domain can be completely kept OFF or ON irrespective of the neighboring block. A power domain contains a collection of design elements that share a primary power and ground supply net. The logic hierarchy level where a power domain is created is called the scope of the power domain. Any design elements that belong to a power domain are said to be in the extent of that power domain.

Power Management Unit:


Standard Cells for Power Management:




Power Switch Standard Cells:


To turn OFF power supply to a power domain for a particular time of operation, we need a power switch to cut the power supply(VDD/VSS) to the domain. The switch is created within the scope of the power domain. The switch is either turned on or off as per the requirement.

Isolation Standard Cells:




When Power Gating method is applied to a design, in a particular mode of operation, we might end up with few ON domains and few OFF domains. If the outputs of the Shutdown domain are connected to the Active Part of the design, then it might lead to Invalid Signal Transmission and crowbar current as a result. To avoid this, an Isolation Cell is placed on the output nets of Switched OFF domains  interacting with an Active Portion of the Design.


Retention Standard Cells/Flops :


A retention cell is used to retain the data required in shut down power domain. A retention cell consists of a flipflop and a save latch and has two control signals, SAVE and RESTORE. SAVE signal indicates when the data should be saved in the latch, which is just before Switching OFF the power. RESTORE signal tells when the data stored in latch should be restored which is when the domain gets back to active state.

Level Shifter Standard Cells:


When two blocks powered with different voltage levels interact with each other, invalid signal transmissions and crowbar current generation may take place. To avoid this, level shifter cells are placed between the blocks with distinct voltage values. Level shifter cell can convert a high voltage level to low voltage level between the domains. Level shifters are the placed on signals that have sources and sinks operating at different voltages.


Power Management Methods:

1. Voltage Management Methods:

Most common of voltage management methods is Dynamic Voltage Scaling (DVS). Here the circuit can statically or dynamically vary VDD depending on the throughput requirement. Multi-Voltage domain designs can also be classified under this category. 

2.Throughput Management Methods:


Dynamic Frequency Scaling (DFS) is one of the most used methods in this category. CPU frequency scaling for battery powered computers is examined in in terms of its impact on battery life, system performance, and power consumption. This method ensures efficient use of the battery without compromising system performance.

3. Functional Management Methods:

An alternate design or implementation method that consumes less power. Some of the low power design techniques such as low power FSM design, bus encoding, gate reordering and battery aware dynamic task scheduling represent few such cases.


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