In this insightful article, we delve into several key aspects within the realm of VLSI technology, focusing primarily on the groundbreaking concept of Strained Silicon as a channel material. Our discussion encapsulates the significance of Strained Silicon, positioning it as a pivotal milestone in the evolution of VLSI. Throughout the video, we unravel the intricate details surrounding Strained Silicon, exploring fundamental questions such as the nature of SiGe (Silicon Germanium) and the application of strain in Silicon. The discourse extends to a comprehensive examination of the band structure of Silicon, shedding light on the nuanced effects of biaxial tensile strain and compressive strain. By addressing these critical facets, we aim to provide a thorough and elucidating overview of the multifaceted world of VLSI technology and its transformative Strained Silicon component.
VLSI Milestone & Strained -Si:
From 90 nm technologies, the performance boost by method of MOSFET dimension scaling started to diminish. MOSFET scaling resulted in several physical limitations. Higher body doping leads to lower carrier mobility, higher junction capacitance, increased junction leakage Thinner gate dielectric leads to higher gate leakage Strained Silicon channel has been introduced as technology booster. The mobility enhancement obtained by applying appropriate strain provides higher carrier velocity in MOS channels and drive current, respectively, at the same supply voltage and gate oxide thickness. Tensile and compressive strain applied to channel. Strain changes lattice constant and energy band structure of silicon.
What is Strain Si?
Strained Silicon is literally Silicon which is strained. Strain is induced using different mechanism. In Strained-Si atoms are stretched beyond their normal inter-atomic istance. Advantage of s-Si relies in its ability to fundamentally alter the band structure in ways that increase the effective mobility. The basic idea in strained Si CMOS is to modify the carrier transport properties of Si by introducing strain in order to improve performance of MOSFETs. Mobility improvement in strained silicon takes place mainly due to the reduction of the carrier conductivity effective mass and the reduction in the inter-valley phonon scattering rates. Semiconductor with smaller lattice constant than substrate leads to compressive stain on top layer. Semiconductor with larger lattice constant than substrate leads to tensile strain on top layer.
What is SiGe?
SiGe is an alloy with any molar ratio of silicon and germanium, i.e. with a molecular formula of the form Si1−xGex. Used as a semiconductor material in integrated circuits (ICs) as a strain-inducing layer for CMOS transistors. The biaxial tensile strain in the strained Si layer on relaxed SiGe can be tailored by the Ge content.
How strain is applied in Si?
Two types of strain : Tensile and Compressive strain. Two direction of strain : Biaxial and Uniaxial Strain.
Biaxial strain/Global Strain :
Introduced by epitaxial growth of Si and SiGe layers. The strain is induced by the lattice mismatch between Si and SiGe.
Advantages : Uniformly strained layers obtained. Can be implemented with standard CMOS process with minimal modification.
Disadvantages :Limited improvement of PMOS transistor performances, occurrence of defects and dislocations at the boundary surfaces, increased production costs.
Uniaxial /Local Strain :
Introduction of local structures and materials cause strain in the channel of transistors. This is local/uniaxial strain.
In pMOS the source and drain are formed by epitaxial SiGe which introduce uniaxial compression in the channel area . A tensile capping layer in nMOS creates uniaxial strain.
Band Structure of Silicon:
Each energy level of silicon is composed of six equal energy valleys in three dimensions. In inversion layers, these six valleys are split into two fold out of plane valleys located at the kz axes (001) direction and four fold in-plane valleys in kx (010) direction and ky axes (100) direction. The electrons in all these conduction valleys have transverse mass (mt =0.19m 0 ) and longitudinal mass (m l = 0.916m 0 ). Clearly ml > mt .
In the two fold valleys, the electrons have transverse mass parallel to the MOSFET Si/SiO2 interface and longitudinal mass perpendicular to the interface.
On the other hand, in four fold valleys, the electrons have transverse mass perpendicular to the MOSFET Si/SiO 2 interface and longitudinal mass parallel to the interface. There are three valence band subband : HH,LH and SO.
Impact of Biaxial Tensile Strain :
With tensile strain, two out of plane (∆ 2 )valley move lower and the ∆ 4 valleys move upward energitically. This band alteration gives an alternate lower site for electrons to reside i.e. ∆ 2 valleys. Value of mt in the lower energy valleys ∆ 2 is lesser than the ∆ 4 valleys in the direction parallel to the interface suitable for the flow of electrons from the source to drain. Inter-valley phonon scattering between the lower and upper states is decresed. Due to this, the electron mobility increases. With strain, valence sub-bands splits and their shapes changes. HH and LH bands split and move away and SO hole subband move downward further. Both in-plane and out-of-plane hole mobility is improved mainly due to the reduced inter-band and intra-band scatterings.
Impact of Compressive Strain:
Both biaxial and Uniaxial stresses have similar effect on the conduction band structure whereas the effects on the valance band are much different. Hence, the mobility gain is similar for uniaxial and biaxial strain, as it results from the splitting of the six-fold degenerate conduction band valleys for both types of stress.
The uniaxial strain has much more significant advantageous effect on the valance band relative to biaxial stress.
