VLSI Milestone & Multiple Patterning:
Moore’s law has been driving and guiding force for last few decades for enhancement of device performance. As minimum feature size has reduced, CMOS process has been greatly challenged by patterning technique of such miniature device dimension. Due to the fundamental optical resolution limit, the 193nm immersion lithography can only achieve the minimum pitch about 80nm using single exposure. To continue the technology scaling in 22nm, 14nm, and beyond with the 193nm lithography, multiple patterning technologies have been developed to obtain finer pitches. Multi-patterning became a necessary step as next-generation extreme-ultraviolet (EUV) lithography tools were not yet ready for production.
There are two main types of multiple patterning lithography :
(i) based on repeated process,
(ii) based on self-aligned spacer process.
Lithography:
Lithography is the process of transferring patterns of geometric shapes in a mask to a thin layer of radiation sensitive material/resist covering the surface of a semiconductor wafer.
An IC fabrication facility requires a clean room, particularly during lithography process. Dust particles settling on semiconductor wafers and lithographic masks can cause defects in the devices. Performance of a lithographic exposure is determined by three parameters: (i) resolution, (ii) registration, (iii) throughput.
Resolution is defined to be the minimum feature dimension that can be transferred with high fidelity to a resist film on a semiconductor wafer. Registration is a measure of how accurately patterns on successive masks can be aligned or overlaid with respect to previously defined patterns on the same wafer. Throughput is the number of wafers that can be exposed per hour for a given mask level and is thus a measure of the efficiency of the lithographic process
Different Types of Lithography:
Optical Lithography : Majority of lithographic equipment for ICfabrication is optical equipment using light in the ultraviolet range of the EM spectrum.
(a) DUVL : Uses controlled 254–193-nm light to create pattern.
(b) EUVL : Uses 13.5 nm light to create intricate patterns on silicon wafers. EUVL wavelength is close to X-ray. EUV lithography reduces the number of mask count, although more expensive than other systems for microchip lithography.
X-ray lithography: Uses X-rays, X-ray sensitive special resist, a mask composed of an X-ray absorbing material
patterned on a thin membrane that is X-ray transparent, often made of low atomic number elements like Si/B.
Ion Lithography : Ion lithography can achieve higher resolution than optical, x-ray, or electron beam
lithographic techniques because ions undergo no diffraction and scatter much less than electrons.
E- Beam Lithography (EBL) : Direct writing lithographic process. Uses a focused beam of electrons to form patterns. E-beam lithography is not suitable for high-volume manufacturing because of its limited throughput.
Depending on exposure method 3 types of printing are there :
(i) contact printing
(ii)proximity printing
(iii) projection printing
What is Multi-Patterning?
A class of technologies developed for photo-lithography to enhance the feature density. A single lithographic exposure may not be enough to provide sufficient resolution. Multiple patterning is a technique that overcomes the lithographic limitations in the chip-manufacturing process. Single exposure, 193nm wavelength lithography reached its physical limit at 40nm half-pitch. MP enables chipmakers to image IC designs at 20nm and below.
There are two main categories of Multi Patterning:
(i) pitch splitting and (ii) spacer.
Pitch splitting includes Double and Triple Patterning.
Spacer involves self-aligned double patterning (SADP) and self-aligned quadruple patterning (SAQP).
Why Multi-Patterning is Required?
Rayleigh criterion specifies the minimum separation between two light sources that may be resolved into distinct objects. Critical dimension or resolution is defined as :
Feature size is constantly dropping to lower value. CD can be reduced by :
1. Increasing NA : NA cannot be increased beyond 0.93. It will reduce the depth of focus and sharpness of the image printed become less
2.Decreasing k1 : Reducing k1 is a good option. In single patterning k1 is restricted to a minimum of 0.25 and cannot go beyond that . Using multiple patterning decreases k1 from 0.25.
3.Decreasing λ : Reducing λ below 193 nm results in a lot of technical issues cost, risk and throughput.
If a pitch could not be achieved in a single lithography step, the design is split over two lithography layers so that the minimum pitch is relaxed with respect to the target pitch.
In this way the effective k1 of the total process resulting from combination of the two lithography steps can drop below the 0.25 for a single patterning process. The increased pitch size enables higher resolution and better printability.
Phase Shift Mask :
PSM is used to alter the phase of the light passing through some areas of the mask. Phase change modifies the way light is diffracted. As a result defocusing effect reduces. The downside of using phase-shift techniques is that such masks are more difficult and expensive to make.
Optical Proximity Correction:
A photolithography enhancement technique. Used to offset the optical proximity effect. Photomask patterns transferred onto a photoresist under insufficient resolution develop inaccuracies. In OPC, mask geometry is modified to compensate for pattern transfer non-idealities.
Layout Decomposition :
Splitting one layer into multiple masks. For MPL , one of the most fundamental problems is to decompose the layout into a specific number of masks, such that each mask should be able to manufactured under current lithography.
When there is not enough distance between two patterns, different masks should be used to print them. It is possible that given masks are not enough to print specific features, which results in conflicts. Thus, one basic objective for layout decomposition is to avoid conflicts.
Double Patterning:
Double patterning is a technique used in the lithographic process for sub 30 nm process. This process requires increased mask and lithography costs. DP is an effective way to counter the effects of diffraction in optical lithography. Such situation occurs because the light source has wavelength of 193 nm and the process node is fraction of that. Diffraction effects makes it difficult to produce accurately defined deep sub-micron patterns using existing lighting sources and conventional masks. Sharp corners and edges become blurs, and some small features on the mask won’t appear on the wafer at all.
Three types of method :
(i) Litho-Etch-Litho-Etch (LELE):
(ii) Litho-Freeze-Litho-Etch (LFLE):
(iii) Spacer/Self Aligned Double Patterning (SADP):
Triple & Quadruple Patterning :
Triple patterning is quite silimilar like double patterning. In this process polygons are partitioned into three masks. Advantage of triple patterning over double is that it is denser. Although use of 3 masks create misalignment. TP refers to the litho-etch-litho-etch-litho-etch (LELELE). LELELE requires three separate lithography and etch steps to define a single layer. Provides a reduction in pitch, increase in expense because of increased process steps.
Self-aligned quadruple patterning (SAQP) is the most widely available technology used for patterning feature pitches less than 38 nm. It is already being used to pattern the fins of FinFETs and DRAM. This process allow lines originally drawn 80 nm apart to generate lines which are ultimately 20 nm apart . Able to do high volume lithography compared to EUV , which has 13 nm resolution. SAQP process steps are shown below.
Watch the video lecture here :
Courtesy : Image by www.pngegg.com
