What is RTL Synthesis in VLSI? Synthesis : Episode - 1

In this article , we explore a range of essential topics related to the synthesis process in VLSI design. We begin with an introduction to synthesis, providing an overview of its role and importance in the design flow. Next, we discuss the V-curve of VLSI design, explaining its significance and how it illustrates the different phases of the design process. We then delve into what synthesis means in a general context, offering a comprehensive understanding of its purpose and functions. The concept of abstraction and its various levels is thoroughly examined, highlighting how abstraction helps manage design complexity. We also introduce the Y-diagram, which demonstrates the co-existence of different domains in VLSI design, and discuss the mapping of levels and domains to show their interrelationships. The differences between HDL compilers and synthesis compilers are explained, emphasizing their respective roles. Finally, we provide both a brief and detailed overview of the VLSI design flow, giving viewers a complete picture of the entire process from start to finish.

Once you complete the article you will be able to understand:

1. Difference between HDL compiler and synthesis compiler.

 2. Howw synthesis does attach the technology node to your design? 

3. Various levels of abstraction in VLSI design and their importance .

4. Correlation of various levels of abstraction with the V curve of the VLSI design?

Introduction to Synthesis :

Electronic Design Automation (EDA) tools play a vital role in VLSI design by automating various stages of the process. EDA tools revolutionize VLSI design, combining human ingenuity with automation to streamline the synthesis cycle. Synthesis is a foundational step where abstract Hardware Description Language (HDL) is transformed into a physically realizable design. Synthesis involves complex algorithms and optimizations to consider factors like power, timing, and area efficiency. Analysis and Verification (Design Verification - DV) phase ensures the correctness of the design through tests, simulations, and UVM/OVM verifications. DV phase identifies and rectifies functional, timing, and logical discrepancies, enhancing the quality of the final product. Testing (Design for Testability - DFT) phase focuses on identifying and fixing errors that might occur during fabrication and manufacturing. DFT phase subjects the design to various tests to ensure its resilience against fabrication anomalies.

V-Curve Of VLSI Design:

Before we dive in, it's important to understand that VLSI design is highly complex and requires breaking it into smaller, manageable steps, forming what is known as the V-curve. The "V" represents the descending and ascending phases of the design process. This curve connects to the Y-chart, which we’ll discuss later. Understanding the V-curve is key to grasping the optimization and synthesis process in VLSI design.

The first step is defining system requirements, a collaborative effort between the design team and stakeholders to document all specifications. Next comes system design, where these requirements are translated into a top-level block diagram, dividing the system into smaller sub-blocks or subchips based on their functions—analog, digital, or mixed.

The process continues with subsystem design, focusing on each sub-block in detail. Designers form specialized teams to handle different sections, ensuring a systematic approach. Following this is the design of components, where individual functional blocks are created. These could be logic gates, unit blocks, or specific circuits tailored to the system's needs. Each component undergoes detailed testing for functional correctness, often implemented using Verilog or similar HDL.

Next, the build and check components phase ensures the designed blocks meet specifications. Standard cells and more complex components are built and validated, completing the checklist for component design. Once components are ready, they are integrated to form subsystems in the build and check subsystems stage, leveraging EDA tools for efficient assembly. These subsystems are tested rigorously to identify and resolve faults.

Finally, in the build and check system phase, all subsystems are integrated to form the complete system, culminating in post-silicon validation. This step involves testing prototypes extensively to ensure the system functions as intended. Once validated, the chip is ready for fabrication.

The V-curve captures this entire process, starting with breaking down the system into smaller components and culminating in stitching them together to form a functional design. This approach applies to both digital and analog designs and lays the foundation for synthesis, the first step in chip fabrication. Understanding these abstractions is essential for grasping VLSI design and its challenges.

What Synthesis Means in General ?

Synthesis in VLSI design occurs at multiple points in the design flow, and it’s essential to clarify its meaning upfront to avoid confusion. This generalization applies to the front-end, back-end, and standard cell design processes. A table with infographics will explain synthesis at three levels: logic, circuit, and layout.

Logic Level: Behavioral descriptions, such as FSM or Karnaugh maps written in HDL (Verilog, VHDL, SystemVerilog), are converted into structural logic using predefined gates from a standard cell library. This step, enabled by EDA tools, connects your code to certified, silicon-ready standard cells.

Circuit Level: Logic gates are realized as transistor-level designs through circuit synthesis. This process uses foundry-specific PDKs to map gates to transistor interconnections.

Layout Level: Transistor designs are further synthesized into layouts, forming physical patterns for silicon realization. Layout synthesis, handled by PNR tools, optimizes and arranges standard cell layouts for manufacturability.

In this series, we focus solely on logic synthesis and its role in converting HDL descriptions into structural logic. Other synthesis stages—circuit and layout—will be explored in future discussions. Understanding synthesis at these levels provides clarity on its purpose throughout the VLSI design flow.

What Is Abstraction ?  

Abstraction is a conceptual method used to simplify complex systems or ideas by focusing on the essential aspects while ignoring unnecessary details. It involves creating a higher-level representation that captures the core features and functionality of something, while leaving out the intricacies that aren't relevant to the current context.  Abstraction doesn't eliminate the complexity; it just focuses on what's important for a particular purpose. It's like looking at the world through different lenses, each revealing a specific facet. Abstraction is a powerful tool for managing complexity, encourage understanding, and enabling innovation by allowing us to work with complex systems without being overwhelmed by their minute details. 

Abstraction Levels:

Behavioral domain is all about how a system functions. We imagine a part of the design as a mysterious black box and focus on the relationship between inputs outputs. In structural domain we describe a system by its different parts or subsystems. Geometrical or Physical domain gives information on how the sub-parts can be seen in structural domain. Level of abstraction could be defined as the amount the information that level is hiding within it. Higher level of abstraction means less detailed a level is, so more information is hidden. Lower level of abstraction means more detailed a level is, so less information is hidden. System/Processor level is highest level of abstraction. Switch/Transistor/Circuit Level is the innermost level of abstraction.

Y-Diagram : Co-existence of Domains

Helps us understand digital hardware design. 

3 Axes represent the three domains of VLSI :

Behavioral: what a particular system does.

Structural: how entities are connected together.

Physical: how to build a structure on Si that has the required connectivity to implement the behavior.

5 concentric circles represent five levels of importance or detail in the design: System, Algorithm, Register Transfer, Logic, Circuit Level. Outermost circle is the most general and each circle closer to the center, represents a smaller and more specific part of the design. The five main characteristics at each level of abstraction are basic building blocks, signal representation, time representation, behavioral representation and physical representation.

Mapping of Levels & Domains:

Now, let's focus on the mapping of abstraction levels and domains, as seen in the Y-chart framework. For detailed insights, refer to the relevant episode in the Y-chart series.  

This table illustrates the abstraction levels (behavioral, structural, and physical) and their mapping across different design domains:  

1. System/Processor Level:  

   - Behavioral: Written specifications.  

   - Structural: Modules.  

   - Physical: Physical partitioning.  

2. Algorithm/Architecture Level:  

   - Behavioral: Algorithms, flowcharts.  

   - Structural: Processor, RAM, ROM.  

   - Physical: Clusters.  

3. Functional (RTL):  

   - Behavioral: Data flow, register transfers.  

   - Structural: ALU, MUX, registers.  

   - Physical: Floor planning, standard cells.  

4.Gate/Structural Logic:  

   - Behavioral: Boolean equations.  

   - Structural: AND, OR, XOR gates.  

   - Physical: Standard cells.  

5. Switch/Transistor Level:  

   - Behavioral: Equations.  

   - Structural: Transistors, resistors, capacitors.  

   - Physical: Mask geometry, fabrication details.  

Understanding this mapping helps contextualize VLSI design stages and clarify roles within the workflow. For example, you can identify your position in the design process, understand inputs from preceding teams, and anticipate deliverables for subsequent teams.  This framework is critical for distinguishing between various design engineering roles and navigating the VLSI design flow effectively. 

HDL Compiler Vs Synthesis Compiler:

  

This series focuses on the Synthesis Compiler, while the HDL Compiler was discussed in the Verilog episode. Let’s break down their differences:  

1. HDL Compiler:  

   - Converts handwritten Verilog/SystemVerilog code into a translated design for simulation purposes.  

   - Produces waveforms (e.g., 0s and 1s) for analysis, often visualized using tools like GNU plot.  

   - Examples: Icarus Verilog (Iverilog).  

   - Technology-independent: No association with specific technology nodes (e.g., 10nm or 22nm).  

2. Synthesis Compiler:  

   - Converts the translated design into a technology-specific synthesized netlist using libraries provided by the foundry, such as PDK (Process Design Kit) or DK (Design Kit).  

   - Associates technology nodes (e.g., 10nm, 22nm) to the netlist, marking the transition toward fabrication.  

   - Ensures compatibility with the standard cell library and other design blocks.  

   - Forms the first step in the VLSI fabrication process.  

 VLSI Design Flow : Brief 

Simplified VLSI Design Flow  

- Specification: Initial target specifications (pen and paper).  

- High-Level Description: FSM or similar concepts are defined.  

- RTL Coding: Verilog/SystemVerilog implementation of the design.  

- HDL Compilation: Prepares the design for simulation.  

- Logic Synthesis: Uses PDK/DK to produce technology-bound netlists (e.g., 10nm gate-level netlist).  

- Physical Design: Includes steps like floorplanning, placement, and routing, refining the design for fabrication.  

Technology-Dependent vs. Independent:  

- HDL compilers deal with high-level design descriptions and simulations without technology node attachments.  

- Synthesis compilers introduce technology dependencies, paving the way for fabrication by linking the design to ASIC libraries for specific nodes.  

Synthesis is the gateway to fabrication, bridging high-level design and physical implementation. This understanding helps differentiate the roles of HDL and synthesis compilers in the VLSI design flow.

VLSI Design Flow : Detailed

We also have a detailed episode on this topic, which you can check out for more information. This diagram  summarizes the complete VLSI design flow. While we have covered nearly every step, some areas could be broken down further. For now, I’ve condensed it to fit within this slide.

In this series, we’ll focus specifically on synthesis and not delve into the steps that follow. Synthesis is critical because it prepares the design for fabrication. At this stage, the design transitions from being technology-independent to becoming tied to a specific technology node (e.g., 5nm, 10nm, or 22nm). From this point onward, technology constraints, design rules, and node-specific considerations come into play.

Synthesis marks the shift from a flexible design process to one that requires meticulous attention to technology details. It’s like moving from an open road to a busy, rule-bound highway, where careful navigation is essential.

Watch the video lecture here:

Courtesy: Image by www.pngegg.com